Codasip Founder Karel Masařík Elected to RISC-V Technical Steerage Committee

Munich Germany, October 28, 2021 – Codasip, the main provider of customizable RISC-V processor IP, these days introduced that Dr Karel Masařík, corporate founder answerable for the improvement of Codasip’s core generation, has been elected to the RISC-V Technical Steerage Committee (TSC) through RISC-V World Strategic participants.

The Technical Steerage Committee (TSC) is the overriding technical governance frame inside RISC-V and is made up of job workforce chairs and Premier participants, reporting immediately to the Board of Administrators. RISC-V organizes its technical paintings via status committees which information the paintings executed through job teams and technical particular passion teams (SIGs).

Karel Masařík

Karel Masařík

Karel Masařík commented on his variety, “My involvement with RISC-V is going again to 2016 when Codasip become a founding member of the RISC-V Basis and introduced its first RISC-V IP core. I’m commemorated to be selected to now constitute Strategic participants and to proceed to play a riding position sooner or later evolution of RISC-V. I’m willing to peer additional deployment of RISC-V within the business and extra construction of the ecosystem in spaces of not unusual passion”.

Main as much as his paintings on RISC-V, Dr Masařík undertook analysis in using structure description languages and design automation at Brno College of Generation. This incorporated analysis into {hardware}/instrument co-design, compilers, excessive point synthesis as neatly practical verification of processor designs. He completed a Ph.D. in Laptop Science in 2008.

He then led the improvement of Codasip’s underlying applied sciences as a part of a college generation incubator and based Codasip in 2014. Codasip introduced its processor construction toolset, Codasip Studio, in 2014 and introduced its first RISC-V processor core at the beginning of 2016. He has led the corporate via its seed investment spherical in 2014, sequence a spherical in 2018 and has overseen its persisted world enlargement.

About Codasip
Codasip delivers modern RISC-V processor IP and high-level processor design gear, offering IC designers with the entire benefits of the RISC-V open ISA, along side the original talent to customise the processor IP. As a founding member of RISC-V World and a long-term provider of LLVM and GNU-based processor answers, Codasip is dedicated to open requirements for embedded and alertness processors. Shaped in 2014 and headquartered in Munich, Germany, Codasip these days has R&D facilities in Europe and gross sales representatives international. For more info about our services and products, seek advice from For more info about RISC-V, seek advice from

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